The present invention relates to delay circuits and, more particularly, to an asynchronous delay circuit scaled from an accurate time reference.
Asynchronous delay circuits are utilized in many applications that require a signal to be delayed independent of a clock. However, most, if not all, asynchronous delay circuits are directly generated from a predetermined time constant that is set by the values of resistors and capacitors and, thus, the precision of the desired delay is directly related to the precision of the individual components used therein. Therefore, a precise delay can only be as precise as the precision of the components that are used in the delay circuit.
Hence, a need exists for an asynchronous delay circuit that is independent of the precision of the individual components used in the circuit.